The Magnum V’s scalable platform extends the capabilities of the Magnum product line with higher pin count, higher device under test (DUT) parallelism, higher frequency, coverage for high-speed Flash and mobile DRAM, and lower per-pin cost for achieving a lower total cost-of-test. Magnum V leverages the platform's site-based architecture with models scaling from single site engineering up to multisite massively parallel systems for production. The architecture provides all of the test resources including digital I/O, DC/HV pins, and DUT power supplies in a single tester slot with a per-site multi-core CPU for faster test times optimized for parallel test efficiency. Magnum V software builds on four generations of Magnum's platform software with extended coverage for new DRAM, NAND and MCP device requirements.
“Magnum V is one of the most successful product introductions in our
history,” said
“The key factors in our customers’ selection of Magnum V were superior
test time reduction, the ability to test both Flash and DRAM on a single
platform and the 1.6 Gbps performance required for concurrent
single-insertion testing of MCP devices,” noted
About Magnum
Designed for massively parallel test applications, Magnum provides manufacturers of consumer digital devices an economic test solution for high-volume production. The systems range from 128 to 20,480 digital pins and its per-pin architecture is capable of testing a wide variety of FLASH and DRAM memories as well as embedded logic devices, making it an ideal solution for the high-volume requirements of the consumer digital market.
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